This invention relates generally to radio frequency transceivers and more particularly to transceivers having the receiver section and a portion of the transmitter section thereof adapted for fabrication on a single chip of silicon.
As is known in the art, transceivers include a transmitter section and a receiver section. The transmitter section includes a modulator to superimpose information, i.e., data, onto a suitable radio frequency (RF) carrier signal, such as a microwave frequency carrier signal. The receiver section receives data carried by the carrier frequency signal and, in a heterodyning system, downconverts the received signal to a suitable intermediate frequency signal. Signals having frequencies above the intermediate frequency are then removed by a low pass filter. The data is then extracted from the intermediate frequency signals passed by the low pass filter using a demodulator.
As is also known in the art, it would be desirable to fabricate such transceivers using integrated circuit fabrication techniques. One technique used today is to form the portions of the transceiver which operate at microwave frequencies, (i.e., the modulator and downconverter) on a gallium arsenide, GaAs, chip and the portions of the transceiver which operate at the intermediate frequency, or lower (i.e., the demodulator) on a silicon, Si, chip. While such transceivers are useful in some applications, they are too large in other applications, and because they use GaAs, are relatively expensive.
As is also known in the art, one type of transceiver is adapted to transmit data on a selected one of a plurality of frequency channels and is likewise adapted to receive signals on a selected one of the plurality of signal channels. Further, in such transceiver, the received signals in a selected one of the channels are downconverted to the intermediate frequency and demodulated using two locally generated oscillator signals in quadrature phase relationship as when digital signal processing techniques are used to demodulate, or extract, the data from a selected carrier frequency signal. Accurately generating two quadrature phase local oscillator signals is expensive and difficult.
As is also known in the art, when digital signal processing is used, samples of the intermediate frequency signal are taken and then converted into corresponding digital signals. Further, the frequency spectrum of the sampled signals repeats at the sampling frequency and its harmonics. Therefore, if the receiver is adapted to receive signal over a predetermined band of a predetermined overall frequencies, or bandwidth, over which the plurality of frequency channels extend, the signals are sampled at a frequency, or rate, greater than twice the predetermined bandwidth in order to prevent aliasing, i.e., prevent frequency components of signals in an unselected channel from folding into the pass band of the low pass filter. This minimum sampling frequency is referred to as the Nyquist sampling frequency. It follows then that as the bandwidth over which the receiver channels extend increases, the Nyquist sampling frequency correspondingly increases thereby placing severe sampling frequency requirements on the sampler, or else requiring a limitation in the predetermined overall bandwidth of the transceiver.
As is also known in the art, the receiver section of such transceivers usually includes an analog automatic gain control (AGC) circuit to maintain the strength of the signal being processed at some predetermined level independent of variations in the strength of the received signal. In one AGC circuit, the intermediate frequency signal is fed to an amplifier. The gain of the amplifier is adjusted in accordance with the power of the demodulated signal. Thus, with such arrangement, the analog AGC circuit is used to adjust the strength of an analog signal, i.e., the intermediate frequency signal. As noted above, in some application, digital signal processing techniques are used in the demodulation process. There, the AGC'd analog signal is digitized then fed to a digital signal processor for demodulation. While such AGC'ing technique may be satisfactory in many such digital processing applications, in other such applications, the analog AGC circuit may not provide sufficient gain to prevent undesired computational round-off errors in the digital processing.
As is also known in the art, oscillators are used to generate a signal having a frequency selected in accordance with an applied control signal (i.e., a voltage controlled oscillator, VCO). One technique used to fabricate such VCO is with a ring of serially connected inverters as described in FIG. 3 of an article entitled "A 300-MHZ CMOS Voltage-Controlled Ring Oscillator" by S. K. Enam and Asad A. Abidi, IEEE Journal of Solid State Circuits Vol. 25, No. 1, February 1990. Each inverter in the ring VCO includes an n channel transistor (nMOS transistor) connected in a totem pole arrangement to a p channel transistor (pMOS transistor). The gates of the NMOS and pMOS transistors are connected together to provide a common input for the inverter and the drain and source of the pMOS and nMOS transistors are connected together to provide an output for the inverter. The ring VCO has an inner ring with an odd number of inverters and an outer ring, fed by an output of the inner ring, having an even number of inverters. The outer and inner rings feed a pair of transistors having gates connected to a control voltage. The pair of transistors are arranged to provide a potentiometer which vectorially adds the signals produced by the inner and outer rings in a proportion selected by the control signal. The inner ring provides a signal which oscillates at the highest frequency of the VCO and the outer ring produces a signal which oscillates at the lowest VCO frequency. The pair of potentiometer-arranged transistors produce an output signal having a frequency intermediate between these two extremes. The frequency of oscillation is determined by the total propagation delay through each ring and the control voltage. More particularly, the transistors in each inverter circuit are driven periodically at the frequency of oscillation into complementary conducting/nonconducting states. Because pMOS transistors switch between conducting/non-conducting states slower than NMOS transistors, the oscillation frequency of the inner ring, i.e., the maximum frequency, is constrained by the gain-bandwidth capability of the pMOS transistors.